This application claims priority to Japanese patent application No. JPAP11-358147 filed on Dec. 16, 1999 in the Japanese Patent Office, the entire contents of which are hereby incorporated by reference.
1. Field
The present invention relates to a method and apparatus for serial communications, and more particularly to a method and apparatus for serial communications effectively performed between a host apparatus and optional peripherals.
2. Description of the Related Arts
Many image forming apparatuses, such as copying machines, printers, and so on, have a configuration to allow users to add optional equipment such as an optional sheet bank. For example, a user may install two optional sheet banks in addition to a standard sheet bank, thereby having three sheet banks in total. In many cases, the optional sheet banks are identical to each other and even to the standard sheet bank. Therefore, the image forming apparatus needs to identify each sheet bank.
FIG. 1 shows a configuration of a prior art image forming apparatus 100 including first and second optional sheet banks 11 and 12 which are connected to a main unit 10. In this example, the main unit 10 is provided with at least two sets of requisite signals to be used for the first and second optional sheet banks 11 and 12. One set of signals includes two output signals labeled as S1 and S2 and six input signals labeled as S3 through to S8. This prior art image forming apparatus is configured to be equipped with up to two optional sheet banks, and the set of signals for the second optional sheet bank are arranged to pass through the first optional sheet bank, as shown in FIG. 1. Therefore, each optional sheet bank is provided with 16 signal lines.
In this case, as a number of optional sheet banks is increased, a number of requisite cables, a number of requisite connectors, etc. are also increased which is not desirable from the viewpoint of a cost of equipment.
FIG. 2 shows a configuration of another prior art image forming apparatus 200 including first and second optional sheet banks 21 and 22 which are connected to a main unit 20. In this example, input signals labeled as S3 through to S8 are multiplexed with a plurality of AND gates plus a select signal line S9 so that a total number of signal lines is reduced from 16 to 11.
Thus, the input signals of S3-S8 can be commonly used by the optional sheet banks. However, the output signals of S1-S2 are increased as the number of optional sheet banks is increased, which will lead to a problem similar to the one caused in the case of the prior art image forming apparatus of FIG. 1.
A 2-bit serial I2C (Inter IC) bus is known as a way for serially connecting a plurality of peripherals to a host apparatus. By using the I2C serial bus, a number of signal lines can be decreased. In this case, however, identification of each equipment becomes problematic.
A Published Unexamined Japanese Patent Application No. 9-244986 describes a method of dynamically changing an address of each constituent in order to connect a number of constituents, which is actually of limitless, to the I2C bus, regardless of a number of requisite address lines.
Another Published Unexamined Japanese Patent Application No. 11-96090 describes a method of eliminating a limit for a number of I2C buses to be connected to one I2C bus.
The present invention provides a novel method of performing serial communications between a host apparatus and a plurality of peripherals using an I2C bus. In one example, a novel method includes the steps of providing, making, and mounting. The providing step provides the host apparatus with a processor connected to the I2C bus. The making step makes a logic circuit. The mounting step mounts the logic circuit on each of the plurality of peripherals. In such a method, the making step makes the logic circuit configured to be serially-connectable and communicable with the host apparatus through the I2C bus. Further, the making step makes the logic circuit configured to output a unique logic value based on a number of the peripherals serially connected upstream relative to the host apparatus so that the host apparatus assigns an identification to each of the plurality of peripherals using the unique logic value.
The above-mentioned novel method may further include a sending the steps of sending a command sequentially to the plurality of peripherals using the identification and checking if an acknowledgement signal is returned from each of the plurality of peripherals so as to recognize an existence of a peripheral.
The above-mentioned novel method may further include the steps of sending a command sequentially to the plurality of peripherals using the identification and checking if an acknowledgement signal is returned from each of the plurality of peripherals so as to detect whether a number of peripherals connected is greater than a maximum number of peripherals connectable to the host apparatus.
The present invention further provides a novel image forming apparatus. In one example, a novel image forming apparatus includes a processor and at least one option sheet bank. The processor is configured to be connected to an I2C bus. Each of the at least one optional sheet bank includes a logic circuit configured to be serially-connectable and communicable with the processor through the I2C bus. This logic circuit is further configured to output a unique logic value based on a number of the above-mentioned at least one optional sheet bank serially connected upstream relative to the processor so that the processor assigns an identification to each of the above-mentioned at least one optional sheet bank using the unique logic value.
The processor may send a command sequentially to the above-mentioned at least one optional sheet bank using the identification and check if an acknowledgement signal is returned from each of the above-mentioned at least one optional sheet bank so as to recognize an existence of an optional sheet bank.
The image forming apparatus may send a command sequentially to the above-mentioned at least one optional sheet bank using the identification and check if an acknowledgement signal is returned from each of the above-mentioned at least one optional sheet bank so as to detect whether a number of the optional sheet banks connected is greater than a maximum number of the optional sheet banks connectable to the image forming apparatus.